Adapt for latest MUtils changes.
This commit is contained in:
parent
69fdc81db6
commit
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@ -881,168 +881,168 @@
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<CustomBuild Include="src\Model_FileExts.h">
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<None Include="ReadMe.txt" />
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<Filter Include="Header Files">
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@ -35,7 +35,7 @@
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#define VER_LAMEXP_MINOR_LO 5
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#define VER_LAMEXP_TYPE Alpha
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#define VER_LAMEXP_PATCH 2
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#define VER_LAMEXP_BUILD 1942
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#define VER_LAMEXP_BUILD 1945
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#define VER_LAMEXP_CONFG 1934
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///////////////////////////////////////////////////////////////////////////////
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@ -207,10 +207,11 @@ static int lamexp_main(int &argc, char **argv)
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//Detect CPU capabilities
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const MUtils::CPUFetaures::cpu_info_t cpuFeatures = MUtils::CPUFetaures::detect();
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qDebug(" CPU vendor id : %s (Intel=%s)", cpuFeatures.vendor, MUTILS_BOOL2STR(cpuFeatures.intel));
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qDebug(" CPU vendor id : %s (Intel=%s)", cpuFeatures.idstr, MUTILS_BOOL2STR(cpuFeatures.vendor & MUtils::CPUFetaures::VENDOR_INTEL));
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qDebug("CPU brand string : %s", cpuFeatures.brand);
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qDebug(" CPU signature : Family=%d Model=%d Stepping=%d", cpuFeatures.family, cpuFeatures.model, cpuFeatures.stepping);
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qDebug("CPU capabilities : SSE=%s SSE2=%s SSE3=%s SSSE3=%s SSE4=%s SSE4.2=%s AVX=%s x64=%s", MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE2), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE3), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSSE3), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE4), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE42), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_AVX), MUTILS_BOOL2STR(cpuFeatures.x64));
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qDebug("CPU capabilities : CMOV=%s MMX=%s SSE=%s SSE2=%s SSE3=%s SSSE3=%s", MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_CMOV), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_MMX), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE2), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE3), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSSE3));
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qDebug("CPU capabilities : SSE4.1=%s SSE4.2=%s AVX=%s EM64T/AMD64=%s", MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE4), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE42), MUTILS_BOOL2STR(cpuFeatures.features & MUtils::CPUFetaures::FLAG_AVX), MUTILS_BOOL2STR(cpuFeatures.x64));
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qDebug(" Number of CPU's : %d\n", cpuFeatures.count);
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//Initialize Qt
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//CPU type selection
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unsigned int cpuSupport = 0;
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if((m_cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE) && (m_cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE2) && m_cpuFeatures.intel)
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const bool haveSSE2 = (m_cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE) && (m_cpuFeatures.features & MUtils::CPUFetaures::FLAG_SSE2);
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if(haveSSE2 && (m_cpuFeatures.vendor & MUtils::CPUFetaures::VENDOR_INTEL))
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{
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if (m_cpuFeatures.features & MUtils::CPUFetaures::FLAG_AVX)
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{
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